Tidy up rfmtest.py to fix all flake8 errors

This commit is contained in:
Starbeamrainbowlabs 2018-12-21 15:44:12 +00:00
parent 1932e05c7d
commit 7ad9f0dfa5
Signed by: sbrl
GPG key ID: 1BE5172E637709C2

View file

@ -1,17 +1,18 @@
# rfmtest.py - performs SPI comms on raspberry pi to RFM95 IC. Paul Richarsd pi@sosgez.co.uk # rfmtest.py - performs SPI comms on raspberry pi to RFM95 IC. Paul Richarsd pi@sosgez.co.uk
#
# NB this is python2 code. SPI data transfer does not use external driver. # NB this is python2 code. SPI data transfer does not use external driver.
# #
import RPi.GPIO as GPIO import RPi.GPIO as GPIO
from time import sleep from time import sleep
# define GPIO board pin assignments for comms # define GPIO board pin assignments for comms
def swait(): # just a short delay. def swait(): # just a short delay.
sleep(0.001) sleep(0.001)
def initports(): def initports():
global gclk, gout, gin, ginit, gen global gclk, gout, gin, ginit, gen
ginit=15 # was 3 # chip reset ginit = 15 # wassyn 3 # chip reset
gclk = 23 # CLOCK gclk = 23 # CLOCK
gout = 19 # MOSI gout = 19 # MOSI
gin = 21 # MISO gin = 21 # MISO
@ -31,7 +32,9 @@ def initports():
GPIO.output(ginit, 1) GPIO.output(ginit, 1)
# READY FOR 1 TRANSFER # READY FOR 1 TRANSFER
def xfr1(iswrite,address,data1): # SPI data transfer main routine. Single byte is transferred out and in
def xfr1(iswrite, address, data1):
"""Main SPI data transfer routine. A single byte is transferred out and in."""
global gen, gout, gin, gclk global gen, gout, gin, gclk
GPIO.output(gen, 0) GPIO.output(gen, 0)
swait() swait()
@ -41,7 +44,7 @@ def xfr1(iswrite,address,data1): # SPI data transfer main routine. Single byte
d1 = d1 | 128 d1 = d1 | 128
swait() swait()
m = 128 # send MSB first m = 128 # send MSB first
for bit in xrange(8): for bit in range(8):
if((d1 & m) > 0): if((d1 & m) > 0):
GPIO.output(gout, 1) GPIO.output(gout, 1)
else: else:
@ -55,7 +58,7 @@ def xfr1(iswrite,address,data1): # SPI data transfer main routine. Single byte
m = 128 m = 128
d2 = data1 d2 = data1
res = 0 res = 0
for bit in xrange(8): for bit in range(8):
if((d2 & m) > 0): if((d2 & m) > 0):
GPIO.output(gout, 1) GPIO.output(gout, 1)
else: else:
@ -77,74 +80,93 @@ def xfr1(iswrite,address,data1): # SPI data transfer main routine. Single byte
def writeReg(where, data): def writeReg(where, data):
xfr1(1, where, data) xfr1(1, where, data)
def readReg(where): def readReg(where):
return xfr1(0, where, 0) return xfr1(0, where, 0)
def ex1(): # just exercising a pin so I can see it on scope def ex1(): # just exercising a pin so I can see it on scope
global gclk, gout, gin, gen, ginit global gclk, gout, gin, gen, ginit
dt = 0.01 dt = 0.01
port = gen port = gen
for x in xrange(100): for x in range(100):
print 1 print(1)
GPIO.output(port, 1) GPIO.output(port, 1)
sleep(dt) sleep(dt)
print 0 print(0)
GPIO.output(port, 0) GPIO.output(port, 0)
sleep(dt) sleep(dt)
def readregs(): def readregs():
print "Reg Value" print("Reg Value")
for x in xrange(0x44): for x in range(0x44):
res = -1 # res = -1
v = xfr1(0, x, 0) v = xfr1(0, x, 0)
print '@',format(x,'02X'), print('@', format(x, '02X'))
print ' ',' $',format(v,'02X') print(' ', ' $', format(v, '02X'))
def GetOpMode(): def GetOpMode():
x = xfr1(0,1,0) # register 1 controls the RFM IC mode. eg FSK/LORA/SLEEP/STANDBY/TX/RX # register 1 controls the RFM IC mode. eg FSK/LORA/SLEEP/STANDBY/TX/RX
x = xfr1(0, 1, 0)
return x return x
def GetRegBitRate(): def GetRegBitRate():
h = xfr1(0, 2, 0) h = xfr1(0, 2, 0)
l = xfr1(0,3,0) l_c = xfr1(0, 3, 0)
return h*256 + l return h * 256 + l_c
def GetCarrierFreq(): def GetCarrierFreq():
h = readReg(6) # MSB h = readReg(6) # MSB
m = readReg(7) m = readReg(7)
l = readReg(8) # LSB l_a = readReg(8) # LSB
return ((h*256.0+m)*256.0 + l)*61.035 # in Hz return ((h * 256.0 + m) * 256.0 + l_a) * 61.035 # in Hz
def SetFreq(mhz): def SetFreq(mhz):
f = int(mhz * 1e6 / 61.035) f = int(mhz * 1e6 / 61.035)
h = int(f / 65536.0) h = int(f / 65536.0)
r = f - h * 65536 r = f - h * 65536
m = int(r / 256) m = int(r / 256)
l = r-256*m l_b = r - 256 * m
writeReg(6, h) # MSB writeReg(6, h) # MSB
writeReg(7, m) writeReg(7, m)
writeReg(8,l) # LSB writeReg(8, l_b) # LSB
return return
def GetAGC(): def GetAGC():
return xfr1(0, 0x61, 0) # or use readReg(0x61) etc return xfr1(0, 0x61, 0) # or use readReg(0x61) etc
def GetAGC1(): def GetAGC1():
return xfr1(0, 0x62, 0) return xfr1(0, 0x62, 0)
def GetAGC2(): def GetAGC2():
return xfr1(0, 0x63, 0) return xfr1(0, 0x63, 0)
def GetAGC3(): def GetAGC3():
return xfr1(0, 0x64, 0) return xfr1(0, 0x64, 0)
def ShowRegs(): def ShowRegs():
print' Some regsiter examples' print('Some regsiter examples')
print 'Op Mode ',GetOpMode() print('Op Mode ', GetOpMode())
print 'Bit Rate ', GetRegBitRate() print('Bit Rate ', GetRegBitRate())
print 'Default carrier freq ',GetCarrierFreq()/1e6, ' MHz' print('Default carrier freq ', GetCarrierFreq() / 1e6, 'MHz')
print 'AGC regs 61-64 : ',format(GetAGC(),'02X'),format(GetAGC1(),'02X'),format(GetAGC2(),'02X'),format(GetAGC3(),'02X') print(
'AGC regs 61-64 : ',
format(GetAGC(), '02X'),
format(GetAGC1(), '02X'),
format(GetAGC2(), '02X'),
format(GetAGC3(), '02X')
)
def main(): def main():
print('Simple GPIO SPI without drivers') print('Simple GPIO SPI without drivers')
@ -153,7 +175,9 @@ def main():
readregs() # shows massive list, before any changes are made readregs() # shows massive list, before any changes are made
ShowRegs() # shows a few interesting registers ShowRegs() # shows a few interesting registers
SetFreq(868.1) # now write to registers 6, 7, 8 SetFreq(868.1) # now write to registers 6, 7, 8
print 'New carrier freq ',GetCarrierFreq()/1e6, ' MHz' print('New carrier freq ', GetCarrierFreq() / 1e6, ' MHz')
print("*** Finished") print("*** Finished")
GPIO.cleanup() GPIO.cleanup()
main() main()